1. Field of the Invention
This invention relates to a circuit arrangement for the operation of read-only memories, which memories can be interrogated with the help of static binary addresses, within a safety switch mechanism whose processing units are provided in pairs and form an original processing channel and a synchronously operating complementary processing channel. More particularly the invention relates to such an arrangement wherein the processing units are dynamically operated in successive processing steps, alternately in positive and negative logic, while using rectangular signal voltages of a given frequency with a 180.degree. phase shift for the two logical values ZERO and ONE of the switching a control circuit for testing the anti-valency of the output signals is connected to comparable outputs of each pair of processing units, and the binary numbers of dynamic original and complementary addresses consist of a given number of the values ZERO and ONE.
2. Description of the Prior Art
Special requirements are given in various fields of modern data processing techniques, in particular in the sense of cybernetics, with respect to safe processing of the given data. This is true, for example, in the case of railroad safety technology, reactor control, and many chemical processes, as well as air travel safety.
The systems for the construction of switching mechanisms, which may be considered in these fields of technology and which comply with the high safety requirements, are to have a fail-safe behavior, since data processing is only guaranteed for a long period of time if special safety principles are present, whereby faults which endanger the operation may not even occur. In this case of electronic systems which are presently available on the market, a difference is made between such systems which operate in accordance with the mentioned fail-safe principle and such systems which deviate from this principle, but which immediately and automatically cause a message in the case of a fault. It is therefore possible to produce a state without an unsafe operation in the respective switch mechanism without a dangerous time loss.
In the case of a prior art safety circuit for producing logical linkages and guaranteeing a high fault safety, the individual logic linkage circuits are not produced in accordance with the fail-safe principle.
In the case of this safety circuit, the individual processing units are provided in pairs and form an original processing channel and a synchronously operated complementary processing channel. Thereby, both the original processing channel and the complementary processing channel contain a special linkage circuit per processing unit, respectively, whereby the two channels carry anti-valency signals in the case of fault-free operation. It is thereby essential that the anti-valency condition is controlled independently of the data flow, which provides that the safety of a fault recognition is not dependent on the general switch state of the safety switch mechanism. It is furthermore an important feature of the prior art safety circuit that rectangular voltages of a given frequency and amplitude are used as switching variables, whereby the two values ZERO and ONE of the switching variables differ through a phase shift of 180.degree.. Therefore, dynamic signals are present upon the original processing channel and the complementary processing channel of the safety switch mechanism, independent of the respective value of the switching variables upon the respective channel. Due to the particularity of the safety circuit and the applied linkage circuit in the form of majority decision circuit, the processing units in both processing channels have an alternate effect in positive and negative logic, in the case of a dynamic operation. Further individual features of this safety circuit will later be explained in connection with other prior art processing units and component groups for a better introduction and understanding of the subject of the instant invention with the help of several examples.
Furthermore, an electronic memory for digital data processing systems having high fault safety is known in the art which, in view of its conception and of its design, may be applied in connection with the above-mentioned safety circuit for carrying out logical linkages. For a better understanding, the prior art individual features will be explained below in the introductory portion of the Description of the Preferred Embodiments.